
74
8008H–AVR–04/11
ATtiny48/88
Note:
1. When enabled, the 2-wire Serial Interface enables slew-rate controls on the output pins PC4
and PC5. This is not shown in the figure. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
Table 10-9.
Overriding Signals for Alternate Functions in PC[6:4
](1)Signal
Name
PC7/PCINT15
PC6/RESET/
PCINT14
PC5/SCL/ADC5/
PCINT13
PC4/SDA/ADC4/
PCINT12
PUOE
0
RSTDISBL
TWEN
PUOV
0
1
PORTC5 PUD
PORTC4 PUD
DDOE
0
RSTDISBL
TWEN
DDOV
0
SCL_OUT
SDA_OUT
PVOE
0
TWEN
PVOV
0000
DIEOE
PCINT15 PCIE1
RSTDISBL +
PCINT14 PCIE1
PCINT13 PCIE1 +
ADC5D
PCINT12 PCIE1 +
ADC4D
DIEOV
1
RSTDISBL
PCINT13 PCIE1
PCINT12 PCIE1
DI
PCINT15 INPUT
PCINT14 INPUT
PCINT13 INPUT
PCINT12 INPUT
AIO
-
RESET INPUT
ADC5 INPUT / SCL
INPUT
ADC4 INPUT / SDA
INPUT
Table 10-10. Overriding Signals for Alternate Functions in PC[3:0]
Signal
Name
PC3/ADC3/
PCINT11
PC2/ADC2/
PCINT10
PC1/ADC1/
PCINT9
PC0/ADC0/
PCINT8
PUOE
000
0
PUOV
000
0
DDOE
0
DDOV
0
PVOE
000
0
PVOV
000
0
DIEOE
PCINT11 PCIE1 +
ADC3D
PCINT10 PCIE1 +
ADC2D
PCINT9 PCIE1 +
ADC1D
PCINT8 PCIE1 +
ADC0D
DIEOV
PCINT11 PCIE1
PCINT10 PCIE1
PCINT9 PCIE1
PCINT8 PCIE1
DI
PCINT11 INPUT
PCINT10 INPUT
PCINT9 INPUT
PCINT8 INPUT
AIO
ADC3 INPUT
ADC2 INPUT
ADC1 INPUT
ADC0 INPUT